Verilog HDL for Digital Design and Simulation

Verilog HDL for Digital Design and Simulation

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This book was written for beginners and intermediate-level Verilog users who want to improve digital design and simulation.
It will help Verilog users to develop a proficiency in using Verilog for design and simulation. The book coverage emphasizes on three subjects: Verilog language fundamentals, digital design, and functional simulation. Each of the subjects is accompanied with many practical examples and illustrations. The Verilog syntax and example codes are compliant with Verilog-2001 (the IEEE standard 1364-2001).